Block normalization processor
US5727123A · kind A · utility
35Cited by
3References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 1995 |
| Grant date | Mar 10, 1998 |
| Priority date | — |
| Expiry date | Dec 20, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG10L2019/0013
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for implementing a vocoder in a application specific integrated circuit (ASIC) is provided. The apparatus contains a DSP core that performs computations in accordance with a reduced instruction set (RISC) architecture. The circuit further includes a specifically designed slave processor to the DSP core referred to as the minimization processor. The apparatus further comprises a specifically designed block normalization circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.