Circuit encapsulation process
US5728600A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 1994 |
| Grant date | Mar 17, 1998 |
| Priority date | — |
| Expiry date | Nov 15, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49146
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for encapsulating portions of a circuit formed on a substrate. The substrate has two faces and perimeter sides. Encapsulating surrounds, in molding compound, a portion of one of the faces of the substrate and a portion of the sides of the substrate, and during encapsulation a portion of the one face of the substrate that bears conductive pads is left unencapsulated. An encapsulated circuit including a substrate having two faces and perimeter sides around the faces and a circuit formed on the substrate. The substrate also includes conductive pads that are formed on a portion of one of the faces near one of the sides and are connected to the circuit. An integrally formed encapsulating mass encapsulates all of the one face except in the region of the pads, all of the other face except in a region opposite to the region of the pads, and all of the sides.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.