Spin-on conductor process for integrated circuits
US5728626A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Oct 23, 1995 |
| Grant date | Mar 17, 1998 |
| Priority date | — |
| Expiry date | Oct 23, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of planarizing a non-planar substrate, such as filling vias and contact holes, spreads a suspension of a conducting material suspended in a liquid on a substrate. The suspension includes an organometallic material, preferably with particles of a polymerized tin or indium alkoxide. The material is spread by spinning the substrate after applying the suspension. The carrier liquid and organic groups are removed by baking and curing at elevated temperatures, thereby depositing the conductive material on the substrate in a layer which is more planar than the substrate and which has regions of greater and lesser thickness. A relatively brief etch step removes conductive material from regions of lesser thickness, leaving material filling vias or contact holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.