Programming memory devices through the parallel port of a computer system
US5729683A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 1995 |
| Grant date | Mar 17, 1998 |
| Priority date | — |
| Expiry date | May 18, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A controller circuit that controls the transfer of a computer operating system from a host computer into a hand-held computer system through the parallel port without the need of intervention from the microprocessor. The operating system is loaded into flash memory devices located in the hand-held computer. The protocol used for the transfer is the IEEE 1284 bi-directional parallel port specification. To begin the transfer of data, the host computer performs a negotiation according to the 1284 standard with the hand-held computer. After the host computer has determined that the hand-held computer is 1284 compliant, it embeds two flash command bytes to indicate the type of command to be performed, selects the desired banks of flash memory, and selects the block in the flash memory. The commands that are performed include a write, a read array, a block erase, a read ID, a read status register, a clear status register, and a parallel port disable command. The controller circuit performs handshaking functions through the parallel port with the host computer, and it seizes control of the system data bus when a transfer is desired.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.