System and method for accessing peripheral devices on a non-functional controller
US5729767A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 1994 |
| Grant date | Mar 17, 1998 |
| Priority date | — |
| Expiry date | Oct 7, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3476
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system including a host CPU, a primary PCI bus coupled to the CPU, and a bus adapter coupled to the primary PCI bus, wherein the host CPU can access peripherals comprised in the bus adapter even when the bus adapter is inoperable. The bus adapter includes a PCI to PCI interface controller which includes a primary PCI interface for coupling to the primary PCI bus and a secondary PCI interface bridge for coupling to a secondary PCI bus. Peripheral bus interface logic is coupled between the primary PCI interface and the secondary PCI interface, and this interface logic couples to various peripheral devices, including ROM/Flash memory and non-volatile static random access memory (NVSRAM). According to the present invention, a host utility executing on the CPU can access the peripheral devices without having to access the secondary PCI bus. Thus, if the secondary PCI bus becomes inoperable or the local processor is unable to boot, the host can still access the memory in the peripheral devices because the peripheral interface is effectively decoupled from the secondary PCI bus and the local processor. The present invention includes a host utility which can update the Flash mem…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.