Time-interleaved bit-plane, pulse-width-modulation digital display system
US5731802A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 1996 |
| Grant date | Mar 24, 1998 |
| Priority date | — |
| Expiry date | Apr 22, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0216
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A time interleaved bit addressed weighted pulse width modulation (PWM) method and apparatus reduces the bandwidth requirement necessary for providing a plurality of data entries regarding multiple points of information. As is well known, a weighted PWM scheme modulates an output by utilizing a frame time that is divided into events of varying durations; most conventional schemes have each bit in the frame being half the duration of its predecessor. The modulated signal is activated during all, some or none of the events in the frame to develop a signal representing a particular parameter. This method and apparatus can be used in a display for selecting among varying levels of gray scale or from among multiple colors on a palette. In one application for a display, a register containing the same number of data pits as pixels in a row of the display is provided. The register is loaded with one bit per frame for each pixel in the entire row. The bandwidth is reduced because the bit for each of the pixels are not all for the same weight event. This allows a bit for a long duration event to be displayed in one pixel, while more than one bit for shorter duration events to be displayed in …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.