Circuits, systems and methods for modifying data stored in a memory using logic operations
US5732024A · kind A · utility
2Cited by
3References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 19, 1995 |
| Grant date | Mar 24, 1998 |
| Priority date | — |
| Expiry date | Apr 19, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system 104 is provided which includes an array 200 of memory cells arranged in rows and columns. Circuitry 207, 208, 209, 210 is also provided for selectively performing logic operations on a bit of data stored in a selected memory cell using a bit of received modifying data. Circuitry 207, 208, 209, 210 for performing logic operations is operable during an AND operation to write the bit of modifying data into the selected memory cell when the bit of modifying data is a logic zero and maintains an existing bit stored in the selected cell when the bit of modifying data is a logic one.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.