Differential stage logic circuit
US5734272A · kind A · utility
70Cited by
8References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 6, 1996 |
| Grant date | Mar 31, 1998 |
| Priority date | — |
| Expiry date | Mar 6, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0016
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ECL stage has its current consumption adapted to its operation speed. For this purpose, the load resistor and the bias current source are adjustable so that the product of the current value of the source by the resistor value is substantially constant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.