Patent · US Expired

Abbreviated trial-and-error technique for correcting long bursts of consecutive errors using CRC bytes

US5734663A · kind A · utility

47Cited by
7References
8Claims
0Family size

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Inventor

Key dates

Filing dateJun 24, 1996
Grant dateMar 31, 1998
Priority date
Expiry dateJun 24, 2016

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L1/0057
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A method for correcting error bursts in data which are uncorrectable by an ECC in a communications channel in which no pointer is available or if available is not generated. The data is recorded in blocks preferably comprising subblocks. Parity cell syndromes are generated for each block during writing; and during reading these syndromes are analyzed to identify possible starting points of error burst locations. A trial correction is applied to the data in the uncorrectable block (or subblock), then verified whether successful using CRC. The correction is accepted as valid if and only if only one trial correction is verified as successful. The maximum number B of consecutive bytes in error correctable in a block is less than, the number N of bytes in each parity cell, and N-B is selected to limit the probability of miscorrection.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.