Method and circuit for reconfiguring a buffer
US5736867A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 1996 |
| Grant date | Apr 7, 1998 |
| Priority date | — |
| Expiry date | Jun 4, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/017581
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A reconfigurable buffer circuit capable of producing an active high or an active low output signal in accordance with a stored control parameter that is input to the buffer circuit. The reconfigurable buffer circuit has an output buffer that outputs a buffered output signal corresponding to an input signal. The reconfigurable buffer control circuit also has a control circuit that receives and stores an inputted control parameter, and receives at least one control signal from a control signal source. Based on the stored control parameter and the at least one control signal received from the control signal source, the control circuit produces the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.