Apparatus and method for the automatic determination of a standard library height within an integrated circuit design
US5737236A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 1996 |
| Grant date | Apr 7, 1998 |
| Priority date | — |
| Expiry date | Feb 8, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method (100, 150, 200) and associated data processing system (250) for determining a standard cell height within an integrated circuit design. A plurality of cell types, each cell type including a plurality of cell structures are received (102). Then, weighting values are received, one for each cell type (104). Expected intercell connection densities are preferably also received. Various target cell heights are processed with the plurality of cell types, the weighting values, and the expected intercell connection densities to generate a standard cell height (106). The standard cell height used with the integrated circuit design produces an optimized integrated circuit area, preferably a minimum area. The present invention includes a method (200) and system (250) for selecting an optimized standard cell height that, when used with a place-and-route tool to generate a physical design file (204) produces an optimized physical integrated circuit design. A method of manufacture (300) is also included.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.