Nonvolatile semiconductor memory which is connectable to a DRAM bus
US5737258A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 1996 |
| Grant date | Apr 7, 1998 |
| Priority date | — |
| Expiry date | Apr 26, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electrically erasable and programmable nonvolatile memory device (EEPROM) such as a flash memory, is pin compatible with a dynamic random access memory device (DRAM), such that flash memory may be connected to a DRAM bus. Preferably, the flash memory is read and write timing-compatible with the DRAM read and write signals and is also preferably block read and block write timing compatible with DRAM block read and block write signals. The flash memory accepts signals to perform sleep and erase functions from signal lines of a DRAM bus which are not used by a DRAM. In order to perform a block erase, which is a characteristic of flash memory, the device preferably accepts an instruction to perform a block erase from signal lines of a DRAM bus which are not used by a DRAM and a block address for the block erase from the most significant bit address lines of the DRAM bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.