Circuit for localizing errors in Reed-Solomon decoders
US5737343A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 22, 1995 |
| Grant date | Apr 7, 1998 |
| Priority date | — |
| Expiry date | Jun 22, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/1535
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a Reed-Solomon error correction system, the coefficients of the syndrome polynomial of degree 2t-1 are stored in a first set of registers R, coefficients 0,0 . . . ,0,1,0 are stored in a second set of registers .lambda., and a first number is stored in a counter. Coefficients 1,0 . . . ,0 are stored in a third set of registers Q, zeroes are stored in a fourth set of registers .mu., and a number exceeding the first number by 1 is stored in an indicator register. PA1 a) If the content of the counter is higher than or equal to the content of the indicator register, or if the content of the last register of the first set of registers R is zero, value Q.sub.2t-1 R.sub.i-1 +R.sub.2t-1 Q.sub.i-1 is stored in each register R.sub.i of the first set of registers R, and value Q.sub.2t-1 .lambda..sub.i-1 +R.sub.2t-1 .lambda..sub.i-1 is stored in each register .lambda..sub.i of the third set of registers .lambda.. PA1 b) Otherwise, the contents of the first set of registers R, the second set of registers .lambda., and the counter are further transferred into the third set of registers Q, the fourth set of registers .mu., and the indicator register, respectively. Steps a) or b) are repeated u…
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