Multiprocessor computer system with interleaved processing element nodes
US5737628A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 1996 |
| Grant date | Apr 7, 1998 |
| Priority date | — |
| Expiry date | Jun 12, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/251
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A multidimensional interconnection and routing apparatus for a parallel processing computer connects together processing elements in a three-dimensional structure. The interconnection and routing apparatus includes a plurality of processing element nodes. A communication connects at least one of the processing elements with a host system. An interconnection network connects together the processing element nodes in an X, Y, and Z dimension. The network includes communication paths connecting each of the plurality of processing elements to adjacent processing elements in the plus and minus directions of each of the X, Y, and Z dimensions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.