Voltage regulator with high gain cascode current mirror
US5739681A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 31, 1994 |
| Grant date | Apr 14, 1998 |
| Priority date | — |
| Expiry date | Oct 31, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45674
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
The present invention provides a voltage regulator especially adaptable for use with a field-programmable gate array (FPGA). The voltage regulator of the present invention rapidly generates an operating voltage for the core or nucleus logic elements upon application of external power while preventing degradation of the fuses. The core or regulated voltage of a FPGA can be set to a level that provides maximum performance with minimum power consumption or, alternatively, permits propagation delays and switching rates to be adjusted so as to compensate for die to die variation. Since it is common for electrical parameters of FPGA manufactured in different wafer fabrication facilities to vary, the voltage regulator is configurable as a true voltage regulator or, alternatively, as a pseudo-voltage regulator. The voltage regulator comprises an operational transconductance amplifier with a single gain stage followed by an NMOS source follower. The amplifier is frequency compensated at the high impedance output of the amplifier by a capacitor coupled to V.sub.SS. The voltage regulator further includes circuitry to improve performance during the power-up sequence and to a novel cascode conn…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.