Apparatus and method for controlling interrupts to a host during data transfer between the host and an adapter
US5740467A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 1994 |
| Grant date | Apr 14, 1998 |
| Priority date | — |
| Expiry date | Sep 21, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2205/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for transferring data in a data processing system to and from a host system. A communication adapter or input/output controller device is provided in which queues are utilized to transfer information between the adapter or controller and the host system. In order to minimize the amount of time a system or I/O bus or network is used during transfer of data between the adapter or controller and the host system, and reduce the amount of work that must be performed by the host system, the number of interrupts by the adapter or controller of the host system is limited to the minimum amount necessary by using an interrupt arm mechanism and by keeping track of completion indices stored in the host system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.