Amorphous silicon on insulator VLSI circuit structures

US5742075A · kind A · utility

Assignee

• IOWA STATE UNIVERSITY RESEARCH FOUNDATION, INC. · US

Inventors

• Stanley G. Burns · Ames, US
• Carl Gruber · Le Sueur, US
• Howard R. Shanks · Ames, US
• Alan P. Constant · Ames, US
• Allen R. Landin · Ames, US
• David Schmidt · Rowayton, US

Key dates

• Filing date: Nov 18, 1996
• Grant date: Apr 21, 1998
• Expiry date: Nov 18, 2016

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/60

Abstract

An integrated thin film transistor on insulator circuit made up of a number of thin film transistors formed with small feature size and densely packed so as to allow interconnection as a complex circuit. An insulating substrate, preferably flexible, serves as the support layer for the integrated circuit. Control gate metallization is carried on the insulating substrate, a dielectric layer is deposited over the control gate, and an amorphous silicon layer with doped source and drain regions deposited on the dielectric layer. Trenches are formed to remove the amorphous silicon material between transistors to allow highly dense circuit packing. An upper interconnect level which forms connections to the source and drain and gate regions of the thin film transistors, also interconnects the transistors to form more complex circuit structures. Due to the dense packing of the transistors allowed by the trench isolation, the interconnecting foils can be relatively short, increasing the speed of the circuit.