Input current shaping technique and low pin count for pfc-pwm boost converter
US5742151A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 20, 1996 |
| Grant date | Apr 21, 1998 |
| Priority date | — |
| Expiry date | Jun 20, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An integrated circuit controller for power factor correction circuit that provides unity power factor by sensing only a current in the power factor correction circuit and a dc supply voltage. The power factor correction circuit is coupled to a circuit for generating the dc supply voltage. Thus, the dc supply voltage is representative of the regulated output voltage of the power factor correction circuit. The dc supply voltage is sensed and integrated over each clock cycle and compared to an inverted and amplified version of the sensed current for controlling operation of the power factor correction circuit. By sensing the dc supply voltage, rather than the output voltage of the power factor correction circuit, the integrated circuit requires fewer pins. In a preferred embodiment, the integrated circuit also includes a pulse width modulation controller circuit. Because a single clock signal is utilized for performing both leading edge modulation in the power factor correction circuit and trailing edge modulation in the pulse width modulation circuit, fewer pins are required. Therefore, the integrated circuit controls the power factor correction circuit and the pulse width modulation…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.