Method and apparatus for a single history register based branch predictor in a superscalar microprocessor
US5742805A · kind A · utility
19Cited by
10References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 15, 1996 |
| Grant date | Apr 21, 1998 |
| Priority date | — |
| Expiry date | Feb 15, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3848
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparati predict whether conditional branch computer instructions should be taken or not taken. A history register is maintained to record the history of groups of instructions, updated only once for each group. The history register and an address of one of the bytes of one of the instructions in each group are appended or otherwise combined to create an address to a table of two-bit saturating counters. The value of one of the bits of the counter at the address created is used for predicting all the conditional branch instructions for each branch in the group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.