Method for fabricating a semiconductor device having copper layer
US5744394A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 1997 |
| Grant date | Apr 28, 1998 |
| Priority date | — |
| Expiry date | Apr 23, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
Abstract
A semiconductor device comprises a plurality of transistors A semiconductor device comprising a plurality of transistors formed on a semiconductor substrate and a metal interconnection layer connected to at least one of the transistors, wherein the metal interconnection layer is composed of a single layer or multi layers, the single layer or at least one layer of the multi layers being formed of copper or a copper alloy, and is connected to at least one transistor wholly or partially through a barrier layer; and at least one of the transistor is controlled on its threshold voltage by a selective ion implantation after formation of the metal interconnection layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.