Silicon wafer manufacturing method eliminating final mirror-polishing step
US5744401A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 1996 |
| Grant date | Apr 28, 1998 |
| Priority date | — |
| Expiry date | Mar 22, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3003
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon wafer is mirror-polished until obtaining surface roughness Ra of 0.70-1.00 nm, Rq of 0.80-1.10 nm, or Rt of 4.50-7.00 nm. The resulting wafer is heat-treated at a temperature not lower than 1,200.degree. C. for 30 minutes to 4 hours in a hydrogen gas atmosphere. According to another aspect, a silicon wafer is mirror-polished until obtaining surface roughness values Ra' of 0.08-0.70 nm, rms of 0.10-0.90 nm, and P-V of 0.80-5.80 nm in a square area of 90 .mu.m by 90 .mu.m, and surface roughness values Ra' of 0.13-0.40 nm, rms of 0.18-0.50 nm, and P-V of 1.30-2.50 nm in a square area of 500 nm by 500 nm. The resulting wafer is heat-treated at 1,100.degree.-1,300.degree. C. for 30 minutes to 4 hours in a hydrogen gas atmosphere.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.