Patent · US Expired

Printed circuit board fault injection circuit

US5744946A · kind A · utility

2Cited by
15References
6Claims
0Family size

Assignee

Inventor

Key dates

Filing dateAug 19, 1996
Grant dateApr 28, 1998
Priority date
Expiry dateAug 19, 2016

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/2808
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

The printed circuit board fault injector circuit uses an automated fixture to enable a robot arm mechanism to position a probe at a designated test node on the printed circuit board under test and apply a fault signal thereto. The test apparatus ensures that the designated node is in contact with the fault injector probe and controllably applies a voltage and/or current signal of selected magnitude to the test node to typically create a stuck-at-one or a stuck-at-zero fault or any other definable condition. The fault injector probe produces a stuck-at-zero fault that is not subject to spurious high frequency harmonics by extending the dynamic range of the fault injector circuit to apply a negative voltage to the test node to rob the output stage of the logic circuit that drives the test node of all drive current, thereby forcing a solid stuck-at-zero condition. Additional monitoring circuitry is provided to detect excessive current drain from the fault injector circuit into the test node to avoid causing damage to the printed circuit board under test.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.