Video signal processing circuit for reducing a video signal
US5745186A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 1996 |
| Grant date | Apr 28, 1998 |
| Priority date | — |
| Expiry date | May 17, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/74
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A 4:4:4 component video signal comprising a luminance signal Y and color-difference signals Cb and Cr is transformed to a 4:1:1 component coded video signal coded by a coding device, reducing processing is carried out after transformation and the result is written into the frame memory based on an enable signal. At this point, the pulse number of the enable signal ENy of the reduced luminance signal is counted, the differential between the horizontal pixel number when the reduced color-difference signals are decoded to the original 4:4:4 component video signal and the horizontal pixel number of the reduced luminance signal is determined, a dummy pulse of this differential is generated and the dummy pulse portion only of the writing address of the frame memory for the reduced luminance signal is shifted backwards. Reduced signals read out from the frame memory are outputted after being decoded to the original 4:4:4 component video signal by the decoding device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.