Clock generating circuit by using the phase difference between a burst signal and the oscillation signal
US5745314A · kind A · utility
8Cited by
9References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 1, 1994 |
| Grant date | Apr 28, 1998 |
| Priority date | — |
| Expiry date | Sep 1, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/896
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit for generating a clock of a predetermined frequency in folllowing-up relation to an input video signal, comprising a PLL circuit including a phase comparison circuit for comparing the phase of a synchronizing signal of the video signal with the phase of a feedback clock corresponding to the clock, and a control circuit for causing the feedback clock in the PLL circuit to be synchronized with the synchronizing signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.