Capacitor formed within printed circuit board
US5745334A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 1996 |
| Grant date | Apr 28, 1998 |
| Priority date | — |
| Expiry date | Mar 25, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0315
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multi-layer printed circuit board comprises a first metallic layer, a first Ta or Hf layer on one face of the first metallic layer, a first layer of Ta.sub.2 O.sub.5 or HfO on a face of the Ta or Hf layer opposite the first metallic layer, a second metallic layer on the Ta.sub.2 O.sub.5 or HfO layer opposite the Ta or Hf layer, a first dielectric layer on the first metallic layer opposite the Ta of Hf layer, and a second dielectric layer on the second metallic layer opposite the Ta.sub.2 O.sub.5 or HfO layer. A multi-layer printed circuit board is formed by adding the following layers to form the second capacitor. A third metallic layer on said second dielectric layer, a second Ta or Hf layer on a face of the third metallic layer, a second Ta.sub.2 O.sub.5 or HfO layer on a face of the second Ta or Hf layer opposite the third metallic layer, a fourth metallic layer on the second Ta.sub.2 O.sub.5 or HfO layer opposite the second Ta or Hf layer, and a third dielectric layer on the fourth metallic layer opposite the second Ta.sub.2 O.sub.5 or HfO layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.