Tray for integrated circuits
US5746319A · kind A · utility
14Cited by
9References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 10, 1995 |
| Grant date | May 5, 1998 |
| Priority date | — |
| Expiry date | Oct 10, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68313
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A tray for storage and transportation of multiple pin grid array (PGA) integrated circuit components each having a planar housing and plurality of terminal pins arranged in spaced rows. The tray has a framework for supporting upstanding ribs that engage the integrated circuit component. Each upstanding rib lies along an axis in one of two sets of intersecting axes and aligns with and fits between certain spaced rows to support the bottom of the component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.