Electrostatic discharge circuit layout
US5748425A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 1996 |
| Grant date | May 5, 1998 |
| Priority date | — |
| Expiry date | Oct 16, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
In order to protect against any damage caused by electrostatic discharges, an integrated circuit layout is provided with at least one circuit connection which is connected via one of two diodes, respectively, to a first supply line and a second supply line. The diodes are reverse biased, i.e., one of them becomes conductive if a potential exists at the circuit connection that is either higher or lower than the supply potentials applying to the supply lines. The circuit layout is provided with an overvoltage suppression device connecting the two supply lines. The overvoltage suppression device is switched into a low impedance state by a steep rate increase or rise in a supply voltage applied between the supply lines such that a discharge current counteracting the increase in the supply voltage will flow via the overvoltage suppression device from the one supply line to the other supply line, and the discharge energy is converted into heat in the overvoltage suppression device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.