SMPS with low load switching frequency stabilization
US5748461A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 19, 1996 |
| Grant date | May 5, 1998 |
| Priority date | — |
| Expiry date | Jun 19, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A switch-mode power supply has a control device with an input for a control voltage which is coupled to a secondary voltage and an output for controlling a transistor that is connected in series with a primary winding of a switch-mode power supply transformer. The control device additionally includes a device for inhibiting the switching transistor from switching on again when a control error that is formed in the control device is less than a reference value. The control signal input and the output of the control device are coupled through a coupling element having a low-pass filter characteristic. A switching-on pulse for the switching transistor is consequently superimposed on the control voltage, with a time delay. If the load to be supplied is small (standby mode), the switching of the switching transistor is inhibited until the switching-on pulse which is coupled to the control voltage has decayed. A stable switching frequency slightly above the audibility limit can be set for the standby mode. The power loss is accordingly low.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.