Synchronous semiconductor memory device with auto precharge operation easily controlled
US5748560A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 28, 1996 |
| Grant date | May 5, 1998 |
| Priority date | — |
| Expiry date | Oct 28, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An internal read/write termination detect circuit generates a one shot pulse signal when a read operation activation signal and a write operation activation signal are both set to an inactive state. An internal operation activation signal generation circuit holds an auto precharge enable signal by a flipflop according to an auto precharge command to generate a precharge operation trigger signal according to the auto precharge enable signal and the one shot pulse signal. An internal operation activation signal is reset to an inactive state. The auto precharge command is made valid to carry out an internal precharge operation only when internal write/read operation is completed. A synchronous semiconductor memory device with easy control of an auto precharge command and reduced in layout area is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.