System for measuring jitter in a non-binary digital signal
US5748672A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 1995 |
| Grant date | May 5, 1998 |
| Priority date | — |
| Expiry date | Aug 11, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/205
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
To measure various frequency components of the jitter of the deviation of the transition times in a signal on a signal line (44) from nominal bit times, a sampler (40) samples the signal at a rate high enough to determine the transition time with the required resolution. By employing a differentiator (60), test circuitry (FIG. 3B) can detect not only zero crossings but all digital-level transitions. The timings of the maxima of the differentiator output are applied to a Fourier-transform unit (76) that computes jitter-frequency components from a resultant sequence of deviations of the maxima from nominal transition times. Although computation of the lowest jitter-frequency components is necessarily based on a sequence that extends over a correspondingly long signal record, the input of a memory (48) that receives the raw samples from which those transition-time deviations are computed is so gated that the memory (48) receives only infrequently occurring bursts of the sampler's high-sample-rate output when the lower jitter frequencies are to be measured. A memory (48) of only moderate size can therefore be employed despite the necessarily high sample rate and necessarily long record…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.