Memory card with erasure blocks and circuitry for selectively protecting the blocks from memory operations
US5749088A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 1997 |
| Grant date | May 5, 1998 |
| Priority date | — |
| Expiry date | Apr 22, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory card includes a plurality of memories, each having an array that includes a first block and a second block. Control circuitry is coupled to the array for controlling memory operations of the array. A block write protect circuit is provided for storing block lock data to selectively lock control circuitry from accessing the array for the memory operations. The block write protect circuit locks the control circuit from accessing (1) the first block when the block write protect circuit stores a first datum of the data and (2) the second block when the block write protect circuit stores a second datum of the data. A control input is coupled to the block write protect circuit for applying a control signal to enable the block write protect circuit to lock the control circuitry in accordance with the data. The memory card further includes a register circuit coupled to the control input of each of the plurality of memories for storing a control datum to generate the control signal. When the register circuit stores the control datum to generate the control signal, the block write protect circuit of each of the plurality of memories is enabled to lock the respective control circuitr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.