Update scheme for impedance controlled I/O buffers
US5751161A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 1996 |
| Grant date | May 12, 1998 |
| Priority date | — |
| Expiry date | Apr 4, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/028
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and circuit are disclosed for changing the output impedance of an impedance controlled buffer from an initial impedance to a final impedance, while minimizing data transmission errors. The buffer has a plurality of impedance control inputs, with each of the plurality of impedance control inputs receiving a corresponding one of a plurality of bits of a binary coded impedance control signal. The output impedance of the buffer is controlled as a function of a value of the impedance control signal. First, the value of the impedance control signal is changed from an initial value corresponding to the initial output impedance to an intermediate value corresponding to an intermediate output impedance which is less than the initial output impedance. Next, the intermediate value of the impedance control signal is changed to a final value corresponding to the final output impedance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.