System and method for accelerated occlusion culling
US5751291A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 1996 |
| Grant date | May 12, 1998 |
| Priority date | — |
| Expiry date | Jul 26, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/405
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An occlusion culling circuit for use in a graphics computer receives graphics primitives data including x and y coordinates for each pixel, a z depth value, and r, g, b, and a or index color data. For each group of primitives, the graphics computer scans the primitive and determines a volume which completely bounds the primitive. The z depth values for the pixels comprising the bounding volume are then compared by the occlusion culling circuit to the depths of the pixels in the already rendered primitives to determine whether any pixels in the incoming primitive are visible. If no pixels are visible, the occlusion culling circuit clears the result register and receives the next graphics primitive. If, on the other hand, one or more pixels is visible, the occlusion culling circuit completely renders the primitives bounded by the bounding volume. Since the graphics primitives which are totally occluded can bypass the more intensive pixel by pixel processing and storage, the speed and efficiency of the graphics computer can be significantly increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.