Data transition detect write control
US5751644A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 1996 |
| Grant date | May 12, 1998 |
| Priority date | — |
| Expiry date | Nov 26, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention concerns data transition method and apparatus for driving a set of write data signals to an inactive (or deasserted) state upon completion of a WRITE to a particular group of memory cells. The present invention drives the write data signals to a an inactive state to end a WRITE without waiting for the end of the write control pulse. The present invention triggers a group of data write buffers to drive one of the write data signals to a "0" at the beginning of the WRITE control pulse or at a data input transition during a WRITE. A delayed transition of the write data signals may be used to drive both the write data signals to a "1" to end the WRITE within a particular memory group. The write data transition detection is accomplished at the write data inputs of the groups of memory cells without relying on global chip data input pin transition detection and pulse width setting. The data setup to the end of WRITE is generally not compromised since the path from chip data input to the input to the write data signals is generally similar to existing implementations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.