Switcher for flexibly interconnecting communication ports
US5751764A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 1995 |
| Grant date | May 12, 1998 |
| Priority date | — |
| Expiry date | Mar 6, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/38
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A switch comprises n I/O ports, where n>2, and a switching core having n inputs connected to the n I/O ports respectively and n outputs connected to the n I/O ports respectively and comprising means operable to connect the ith input, where 1.ltoreq.i.ltoreq.n, to at least the jth output, where 1.ltoreq.j.ltoreq.n and j.notident.i. The switch is configured to connect the kth I/O port to the lth I/O port by: (a) determining current connection state of the kth I/O port and the lth I/O port, (b) if the kth I/O port is currently connected to another I/O port, determining I/O ports to which the kth I/O port is connected and disabling those I/O ports, (c) if the lth I/O port is currently connected to another I/O port, determining I/O ports to which the lth I/O port is connected and disabling those I/O ports, (d) configuring the kth I/O port as a source and the lth I/O port as a destination, and (e) configuring the switching core to provide a forward connection from the kth I/O port to the lth I/O port and a reverse connection from the lth I/O port to the kth I/O port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.