Data processing system for accessing an external device during a burst mode of operation and method therefor
US5752267A · kind A · utility
1Cited by
7References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1995 |
| Grant date | May 12, 1998 |
| Priority date | — |
| Expiry date | Sep 27, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4243
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system (10) flexibly interfaces with both a variety of memory devices and external peripheral devices. A control register (94) is provided for dynamically controlling a timing relationship for read and write accesses executed by the system. A first set of bits (PA) in the control register provides timing control for an initial amount of time required to read a first data value from an external device. A second set of bits (SA) in the control register provides timing control for each successive amount of time required to read a successive data value from the external device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.