Method and apparatus for optimizing pixel data write operations to a tile based frame buffer
US5754191A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1995 |
| Grant date | May 19, 1998 |
| Priority date | — |
| Expiry date | Dec 22, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/122
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for improving pixel data write operations to a tile-based frame buffer. The present invention includes a byte enable first-in first-out register for storing byte enable data for masking pixel data writes to a tile based frame buffer when the pixel data crosses a tile boundary. Pixel data generated by a graphics processor to the frame buffer may traverse multiple tiles. With each 64-bits of pixel data generated, a corresponding byte of byte enable data is generated as mask data for the frame buffer. The byte enable circuit of the present invention may be implemented as a circular shift register to allow the byte enable data to be shifted, rather than being "popped" after the pixel data has been written to the frame buffer. By shifting data rather than "popping" data, the byte enable circuit is able to retain portions of the byte enable data to enable a correct write of a pixel word which may traverse tile boundaries.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.