Patent · US Expired

Computer system with double width data bus

US5754875A · kind A · utility

8Cited by

7References

16Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Klaus J. Getzlaff · Schenefeld, DE
Johann Hajdu
Wilhelm Haller · Winnenden, DE
Birgit Withelm · Holzgerlingen, DE

Key dates

Filing date	Jan 19, 1996
Grant date	May 19, 1998
Priority date	—
Expiry date	Jan 19, 2016

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/30141
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A computer system is described with a 32 bit arithmetic and logic unit which is coupled to a 64 bit data bus. A number of general purpose registers are provided which have 32 bits each and which are organized in two groups. Two 32 bit data words which are present on the data bus can be transmitted and stored in the two groups of the general purpose registers. From there, the two data words can be transmitted via two operand registers to the arithmetic and logic unit. Several further lines are provided for bypassing the general purpose registers and/or the arithmetic and logic unit, if desired. Due to the fact that two data words can always be transmitted, the performance of the computer system is enhanced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.