Self-aligned dual gate MOSFET with an ultranarrow channel
US5757038A · kind A · utility
29Cited by
16References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 6, 1995 |
| Grant date | May 26, 1998 |
| Priority date | — |
| Expiry date | Nov 6, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/518
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A dual gate field effect transistor with an ultra thin channel of substantially uniform width formed by a self-aligned process utilizing selective etching or controlled oxidation between different materials to form a vertical channel extending between source and drain regions, having a thickness in the range from 2.5 nm to 100 nm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.