Contamination guard ring for semiconductor integrated circuit applications
US5757060A · kind A · utility
14Cited by
9References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 19, 1996 |
| Grant date | May 26, 1998 |
| Priority date | — |
| Expiry date | Jul 19, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/975
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The guard ring is a barrier which prevents contaminates from diffusing through a window opening through insulating layers to adjacent semiconductor devices. The guard ring is formed surrounding a window in the insulation layers over a fuse link or an alignment mark. The guard ring is an annular metal ring that penetrates two or more insulating layers and contacts the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.