Data decoding apparatus and method and recording medium
US5757296A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 10, 1996 |
| Grant date | May 26, 1998 |
| Priority date | — |
| Expiry date | Apr 10, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M5/145
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Even if an element such as a ROM is not used, a code reverse conversion can be realized by a sufficiently small scale circuit to be effective for integration. When code data group converted from 8-bit to 15-bit according to a predetermined rule is converted to original 8-bit code data group, an exclusive logic processor 11, a bit shift processor 12, a six-to-four decoder and an eleven-to-eight decoder 14 divides the 15(m) bit code (dividing by m at the maximum) into a plurality of areas, converts "1" (in the case of positive logic) in response to the generated bit position in the respective areas, and the numeric codes obtained by the numeric value converting means are added by an adder 15.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.