Apparatus and method for detecting frame synchronization pattern/word in bit-stuffed digital data frame
US5757869A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 1995 |
| Grant date | May 26, 1998 |
| Priority date | — |
| Expiry date | Jul 28, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0608
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A frame sync acquisition mechanism accurately locates a frame synchronization word within successive selectively bit-stuffed frames of data by not only looking for the frame sync word in the two expected alternative frame sync word locations based upon either the addition of stuff bits or the lack of such stuff bits, but also selectively examining a pair of additional potential locations, one of which precedes and the other of which succeeds the two expected alternative frame sync word locations. If an exact match with the frame sync word is located in either of the expected locations, that location is selected as the reference for the next succeeding frame. During the search of the next successive frame and for every succeeding frame, an attempt is made to initially match the frame sync word with in either of these expected locations. If unable to do so, the search is expanded to encompass the entire window of location uncertainty, so as to include the two additional locations. During this expanded search, that location which yields the smallest number of bit errors is declared as the reference location for the next succeeding frame. If there is a failure to find an exact match ov…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.