High-speed encoder
US5757966A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 1995 |
| Grant date | May 26, 1998 |
| Priority date | — |
| Expiry date | Jul 11, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T9/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An encoder for encoding four bits of uncompressed data in one clock cycle generates one code or in parallel a plurality of codes if the bits can be represented by a code or by a plurality of codes and keeps the bits that can not be represented by a code unaltered. On the following clock cycle, the unaltered bits from the previous clock cycle will be combined with a new set of four bits of data and the cumulative bits will be converted to a code if they can be represented by a code and if they can not be represented by a code, they will be stored until the next clock cycle. The process of storing the cumulative number of bits will be continued until the cumulative number of bits can be represented by a code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.