Trainable apparatus for predicting instruction outcomes in pipelined processors
US5758142A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 1994 |
| Grant date | May 26, 1998 |
| Priority date | — |
| Expiry date | May 31, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A predictor which chooses between two or more predictors is described. The predictor includes a first component predictor which operates according to a first algorithm to produce a prediction of an action and a second component predictor which operates according to a second algorithm to produce a prediction of said action. The predictor also includes means, coupled to each of said first and second predictors, for choosing between predictions provided from said predictors to provide a prediction of the action from the predictor. The predictor can be used to predict outcomes of branches, cache hits, prefetched instruction sequences, and so forth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.