Digital-to-analog converter with dynamic matching and bit splitting
US5760726A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 1996 |
| Grant date | Jun 2, 1998 |
| Priority date | — |
| Expiry date | Aug 23, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/747
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital-to-analog (D/A) converter (400) receives a N bit digital signal S.sub.N by a signal divider (440) which divides it into digital group signals S.sub.Nk. In converter blocks (401.sub.k), these digital group signals S.sub.Nk are then separately converted into analog group signals S.sub.Gk. In a summation circuit (460) these analog group signals S.sub.Gk are combined to the analog signal S.sub.A. The converter blocks (401.sub.k) can comprise banks (430.sub.k) with, e.g., current sources whose currents I.sub.i are combined into the analog group signal S.sub.Gk selectively according to the digital group signal S.sub.Nk. The converter blocks (401.sub.k) can include circuits to equalize component variations, such as dynamic matching circuits (480.sub.k). The converter blocks (401.sub.k) can be configured according to the significance of the digital group signals S.sub.Nk and the hardware can be optimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.