Variable phase clock generator for an electrophotographic printer
US5760816A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 6, 1996 |
| Grant date | Jun 2, 1998 |
| Priority date | — |
| Expiry date | Feb 6, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N2201/04794
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electrophotographic printer includes a photoreceptor on a drum or belt, a laser beam that is reciprocally scanned thereacross, a beam detect signal circuit for generating a beam detect signal and an asynchronous clock oscillator for generating clock pulses. The printer also includes circuitry for generating a plurality of clock signals that are phase synchronized with the beam detect signal. The circuitry includes a tapped delay line for receiving the asynchronous clock pulses, each tap outputting a delayed clock pulse train. A register/selector circuit is coupled to the taps and is responsive to a transition of the beam detect signal for determining a tap which outputs a 0.degree. phase clock transition that is closely proximate to the beam detect signal. Phase delay logic provides signals indicative of which taps of the delay line circuit manifest clock pulse trains that are closest in time to leading and lagging edges of a 0.degree. phase clock pulse, respectively. The phase delay logic circuit further determines taps of the delay line circuit that are intermediate the aforesaid taps and which of those taps should be utilized to provide delayed clock signals of a fractional p…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.