Non-volatile semiconductor memory device
US5761128A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 26, 1997 |
| Grant date | Jun 2, 1998 |
| Priority date | — |
| Expiry date | Mar 26, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/48
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An EPROM has a main memory cell block, test memory cell block and a redundant memory cell block in a memory cell array. The test memory cell block stores a test pattern for a device test after fabrication and a signature code including a maker code and a device code. If some memory cell group in the main memory cell block are substituted for by memory cell group in the redundant memory cell block, the corresponding bit of the signature code is generated by a signature code generator in accordance with the data for the faulty group. The signature code generator selects data read from the redundant memory cell block or the generated bit of the signature code depending on the mode of the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.