Method and apparatus for updating host memory in an adapter to minimize host CPU overhead in servicing an interrupt
US5761427A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 1997 |
| Grant date | Jun 2, 1998 |
| Priority date | — |
| Expiry date | Jul 14, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5652
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In an asynchronous transfer network (ATM), to prevent the bottleneck associated with a host central processing unit (CPU) trying to receive status information for a plurality of interrupts occurring over an interface input/output (I/O) bus, a method and apparatus which transfers all status information directly to the host memory without host involvement. The host CPU is then notified of this new status information via an interrupt. When status information is transferred to the host memory, consistency is ensured and the number of spurious interrupts are reduced. A host software driver may then read the latest status information from the interface I/O bus at its convenience any not incur any performance penalties of I/O accesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.