Dual domain data processing network with cross-linking data queues and selective priority arbitration logic
US5761445A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 26, 1996 |
| Grant date | Jun 2, 1998 |
| Priority date | — |
| Expiry date | Apr 26, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/362
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A two domain network linking a first and second data processing system enables efficient data transfers between modules in the first system and modules in the second system through linkage by bus exchange modules having message queues and snoop-write address queues in each domain. Each system also allocates bus access using a selectively adjusting bus access priority arbitration logic unit. The Snoop-Write address queues in each bus exchange module can temporarily hold a sequence of Write OP addresses snooped from one domain for invalidation in another domain without requiring the bus exchange module to dominate its access priority over other requesting modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.