Physical-to-logical bus mapping scheme for computer systems having multiple PCI bus configuration
US5761448A · kind A · utility
95Cited by
5References
13Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 30, 1996 |
| Grant date | Jun 2, 1998 |
| Priority date | — |
| Expiry date | Aug 30, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/423
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Plug-and-Play (PnP) configuration driver initilization routine and PnP configuration utility for use in PCI bus architectures supporting dynamic I/O bus configurations. The PnP configuration driver includes a logical-to-physical PCI bus mapping scheme maintaining a PCI bus mapping table, and creating a logical-to-physical map table at start-of-day. PCI device drivers access devices through the logical bus numbers, thereby avoiding errors resulting when physical bus numbers change as a result of the addition or removal of buses within a computer system supporting dynamic I/O bus configurations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.